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[VHDL-FPGA-Verilog] mul6

Description: 用vhdl语言设计CPU中的一部分：乘法器的设计，包括多种乘法器的设计方法！内容为英文-design using VHDL language part of the CPU : multiplier design, Multiplier including multiple design! As for the English
Platform: | Size: 462848 | Author: qindao | Hits:

[Post-TeleCom sofeware systems] Behaviouralmodelofasimple8-bitCPU

Description: 个人认为几个比较实用的VHDL源码之二——Behavioural model of a simple 8-bit CPU-think of a few more practical VHDL source bis-- Behavioral mode l of a simple 8-bit CPU
Platform: | Size: 1024 | Author: xingqiba | Hits:

[Books] MCUDesign

Description: 《Digital Logic And Microprocessor Design With VHDL》，CPU设计经典参考书-"Digital Logic And Microprocessor Design With VHDL, "CPU design classic reference books
Platform: | Size: 4815872 | Author: hanberg | Hits:

[VHDL-FPGA-Verilog] cpuTerminate

Description: 用VHDL 编写的一个16位的cpu 设计方案，可以执行8条指令。-use VHDL to prepare a 16 cpu design of the program, the implementation of eight instructions.
Platform: | Size: 2108416 | Author: 宋文强 | Hits:

[VHDL-FPGA-Verilog] vhdl_8cpu

Description: VHDL实现简单的8位CPU doc文件上有源代码-VHDL simple eight CPU doc documents Active code
Platform: | Size: 52224 | Author: 紫蓝 | Hits:

[Other] VHDL-FPGA-clock

Description: ＦＰＧＡ数字钟的设计，用VHDL语言编程，max+plus仿真，可在实际电路中验证-FPGA design, VHDL programming, max plus simulation, in the actual circuit verification
Platform: | Size: 269312 | Author: 王越 | Hits:

[Linux-Unix] erc32vhdl-1.0.tar

Description: ERC32 经典的sparc v7 cpu，针对嵌入式应用，欧洲宇航局采用VHDL语言，可综合。-ERC32 classic sparc v7 cpu against embedded applications, European Space using VHDL can be integrated.
Platform: | Size: 392192 | Author: wangfeng | Hits:

[source in ebook] CPU_use

Description: 使用VHDL语言编写的简单8位流水线CPU 它有六级流水功能，通过仿真 可以下载到实验箱，也有波形仿真-use VHDL to prepare a simple eight pipelined CPU it has six functional water, Simulation experiments can be downloaded to the box, a waveform simulation
Platform: | Size: 1530880 | Author: 邮件 | Hits:

[MiddleWare] cpu_intf

Description: cpu的VHDL的源代码，功能的简单实现-cpu VHDL source code, the function of a simple realization
Platform: | Size: 1024 | Author: 陈娟娟 | Hits:

[Other] x95288xl

Description: CPU外围IC地址译码及读写寄存器的VHDL实现-CPU external address decoder IC literacy and VHDL Register
Platform: | Size: 5120 | Author: popo zhang | Hits:

[Other] CPU8

Description: 本源码实现了8为cpu，开发语言为vhdl，里面有详细的文档和vhdl工程源码-the source to achieve the 8 cpu, development language for vhdl. There are detailed documentation and source code works vhdl
Platform: | Size: 732160 | Author: digg | Hits:

[MPI] sdgshjd

Description: 数字系统设计这是有关的相关源代码，有简易CPU 除法器、计数器等 ...[fpdiv_vhdl.rar] - 四位除法器的vhdl源程序 [vhdl范例.rar] - 最高优先级编码器8位相等比较器 三人表决器（三种不同的描述方式） 加法器描述 8位总线收发器：74245 （注2） 地址译码（for m68008） 多路选择器（使 BR> ... -Digital System Design This is the underlying source code, a simple CPU divider. Counter etc. ... [fpdiv_vhdl.rar]- 4 division of vhdl source [vh dl example. rar]- highest priority encoder compared to eight for phase three of the vote (the three different description ) Adder Description eight bus transceiver : 74245 (Note 2) address decoder (for m68008) Multiple choice (so that BR
Platform: | Size: 1024 | Author: 张瑞 | Hits:

[VHDL-FPGA-Verilog] CPUNEW

Description: MODELSIM开发的模拟CPU，用VHDL语言描述，采用累加结构-ModelSim simulation developed CPU, using VHDL language description of the structure of the use of cumulative
Platform: | Size: 50176 | Author: yyy | Hits:

[VHDL-FPGA-Verilog] cpu-leon3-altera-ep2s60-ddr

Description: 一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的DDR控制器程序！-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of DDR controller program!
Platform: | Size: 752640 | Author: zhao onely | Hits:

[VHDL-FPGA-Verilog] cpu-leon3-gr-pci-xc2v3000

Description: 一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
Platform: | Size: 416768 | Author: zhao onely | Hits:

[Embeded-SCM Develop] demo9_CPU32

Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统软硬件设计-FPGA and SOPC based on the use of VHDL language EDA 32-bit Nios CPU embedded system software and hardware design
Platform: | Size: 926720 | Author: 多幅撒 | Hits:

[VHDL-FPGA-Verilog] cpu86model

Description: cpu86是用VHDL描述的8088IP核，很经典的，有做硬件的同学可以参考-cpu86 is described in VHDL nuclear 8088IP, very classic, and so students can refer to the hardware
Platform: | Size: 245760 | Author: ninghuiming | Hits:

[Software Engineering] CPU

Description: 用VHDL编写的简单的CPU程序，可以实现加法，移位以及跳转等等功能-VHDL prepared using simple procedures CPU, can achieve adder, shift and function Jump, etc.
Platform: | Size: 18432 | Author: 匡木 | Hits:

[Other] SAP-1Cpu

Description: EDA的课程设计，自己写到PPT，大致讲了用VHDL语言实现简易CPU的设计，有源码-EDA s curriculum design, wrote their own PPT, generally speaking the use of VHDL language simple CPU design, with source
Platform: | Size: 278528 | Author: gaoliang | Hits:

[VHDL-FPGA-Verilog] VHDL-XILINX-EXAMPLE26

Description: [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现ADC0809的采样电路设计][15--DMA方式A/D采样控制电路设计][16--硬件电子琴][17--乐曲自动演奏][18--秒表][19--移位相加8位硬件乘法器][20--VGA图像显示控制器(彩条)][21--VGA图像显示控制器][22--等精度频率计][23--模拟波形发生器][24--模拟示波器][25--通用异步收发器(UART)][26--8位CPU设计(COP2000)]
Platform: | Size: 3687424 | Author: hawd | Hits:
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